Conventionally, a semiconductor wafer having silicon, gallium, arsenic, and the like as a material is subjected to a continuity test in a testing step after being manufactured in a condition of having a large diameter. After that, the semiconductor wafer is applied onto a pressure-sensitive adhesive sheet for dicing, and each step of a dicing step, a cleaning step, an expanding step, a picking up step, and a mounting step is performed. An example of the pressure-sensitive adhesive sheet for dicing is one in which a pressure-sensitive adhesive layer made of an acrylic pressure-sensitive adhesive or the like is applied and formed onto a base material of a plastic film (for example, see Patent Document 1).
However, in recent years, semiconductor wafers have become increasingly thin with the spread of IC cards and the like, and because of that, there arises a problem that a semiconductor wafer is deformed (warped) or damaged in the testing step or in the step of applying the wafer onto a pressure-sensitive adhesive sheet for dicing. As a result, it is difficult to steadily handle the semiconductor wafer in these steps. Further, in the case of placing a thin semiconductor wafer onto a stage for the continuity test, there are problems such as flaws and scratches being generated on the backside of the semiconductor wafer and damage (cracks) of the semiconductor wafer being generated by foreign substances, particles, and the like on the stage.
[Patent Document 1] Japanese Examined Patent Publication No. 04-070937